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[VHDL-FPGA-Verilog] verilog实现FSK

Description: 用verilog语言，采用DDS技术实现的FSK
Platform: | Size: 4009917 | Author: yfvictoria | Hits:

[Books] dds

Description: 直接数字频率合成器dds资料-Direct Digital Frequency Synthesizer dds information
Platform: | Size: 911360 | Author: 易小弟 | Hits:

[VHDL-FPGA-Verilog] verilog实例

Description: 一些很实用的verilog源程序，是初学者的好棒手，希望能给需要的人一点帮助，请支持一下。-some very practical Verilog source is the beginners excellent hands, in hopes of giving those who need a bit of help, please support what.
Platform: | Size: 165888 | Author: 叶若寒 | Hits:

[Communication] DDS_VERILOG

Description: 本例给出了DDS的VERIOG的程序事例,可发生正弦\余弦等波形,适应与通信方面的硬件实现!-the cases presented DDS VERIOG procedures example, can occur sine \ cosine wave such as, Adaptation and communications hardware realization!
Platform: | Size: 3072 | Author: 陈榧 | Hits:

[Windows CE] DDSFPGA_cylone

Description: dds设计，花了一个星期做的,verilog写的，可生成多种波形，频率范围可上M,性能不错。-dds design, spent a week doing, verilog written, multiple waveform generation, frequency range available on the M, good performance.
Platform: | Size: 637952 | Author: 苏纳 | Hits:

[SCM] DDS

Description: 基于ｆｐｇａ，采用ｑｕａｒｔｕｓ２的ＤＤＳ信号发生器，采用高速ＤＡＣ９０８为数模芯片，并可通过５１单片机送入调制信号进行ＦＭ调制-Based on the fpga, the use of the DDS signal generator quartus2 using DAC908 number of high-speed chip module, and passed into 51 single-chip FM modulation signal modulation
Platform: | Size: 2745344 | Author: 张新 | Hits:

[VHDL-FPGA-Verilog] oneperiod

Description: 将正弦波分割，数字化处理，即dds技术，为verilog做准备-Will be sinusoidal segmentation, digital processing, that is, dds technology, ready to do for the Verilog
Platform: | Size: 3072 | Author: 严新文 | Hits:

[VHDL-FPGA-Verilog] dds_quicklogic

Description: 这是quicklogic公司的直接频率合成（DDS）Verilog代码-QuickLogic Corporation This is a direct frequency synthesizer (DDS) Verilog code
Platform: | Size: 22528 | Author: jinzhoulang | Hits:

[Books] DDS

Description: DDS直接数字频率合成器，有设计文档，大家交流学习-DDS Direct Digital Synthesizer, a design document, to facilitate the exchange of learning
Platform: | Size: 581632 | Author: hzx1959 | Hits:

[VHDL-FPGA-Verilog] DDSverilogsource

Description: DDS的VERILOG原代码，请大家多支持-DDS of the Verilog source code, please support the U.S. more than
Platform: | Size: 3072 | Author: 屈开 | Hits:

[SCM] dds_quicklogic

Description: dds直接频率合成源代码，基于rom表方式-dds a direct frequency synthesizer source code, based on the way rom Table
Platform: | Size: 22528 | Author: zhangxi | Hits:

[VHDL-FPGA-Verilog] dds_using_FPGA

Description: verilog编写基于fpga的DDS实现-Verilog prepared based on the FPGA to achieve the DDS
Platform: | Size: 448512 | Author: 宇天 | Hits:

[Other] code_for_wireless_communication

Description: 包含软件无线电、dds、滤波器设计、数字调制解调等常用无线通信设计的matlab\verilog源码-Contains software radio, dds, filter design, digital modulation and demodulation of wireless communication, such as commonly used design matlabverilog source
Platform: | Size: 197632 | Author: 李大鹏 | Hits:

[SCM] DDS

Description: 直接频率合成仿真源程序,希望有人能用到.-Direct frequency synthesizer simulation source code, hope someone can use to.
Platform: | Size: 10240 | Author: bajunsheng | Hits:

[VHDL-FPGA-Verilog] dds

Description: 直接频率合成器，采用verilog hdl-Direct frequency synthesizer using verilog hdl
Platform: | Size: 1024 | Author: 江浩 | Hits:

[Other] DDS

Description: 基于DDS技术的函数波形发生器设计，适合用fpga设计波形发生器用-Based on DDS technology function waveform generator design, suitable for FPGA design with Waveform Generator
Platform: | Size: 1682432 | Author: | Hits:

[VHDL-FPGA-Verilog] AM

Description: FPGA内AM调制工程。内带调制波、载波生成。关键词：FPGA verilog AM DDS-AM modulation works within the FPGA. Within the band modulation wave generated carrier. Key words: FPGA verilog AM DDS
Platform: | Size: 1687552 | Author: baixiangzhou | Hits:

[SCM] dds

Description: 关于FPGA中DDS核参数设置的资料，英文版的XILINX资料-DDS on the FPGA in the data set of nuclear parameters, the English version of XILINX information
Platform: | Size: 1664000 | Author: 李晶 | Hits:

[VHDL-FPGA-Verilog] DDS-top

Description: 能够基于DDS实现输出正弦波形的一部分程序，利用Verilog HDL语言编写。-Able to achieve based on the DDS output sine wave-shaped part of the procedure, the use of Verilog HDL language.
Platform: | Size: 299008 | Author: evil | Hits:

[VHDL-FPGA-Verilog] DDS-in-Verilog

Description: Verilog编写基于FPGA的DDS实现，内含源代码，希望对大家有所帮助。-DDS in Verilog FPGA-based implementation, including source code, we want to help.
Platform: | Size: 464896 | Author: haby | Hits:
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